A Multistage Heuristic Tuning Algorithm for an Analog Silicon Neuron Circuit

Authors
Ethan Green, Takashi Kohno
Corresponding Author
Ethan Green
Available Online 1 June 2017.
DOI
https://doi.org/10.2991/jrnal.2017.4.1.13
Keywords
neuromorphic engineering, analog VLSI, silicon neurons
Abstract
This research looks at an ultra-low power subthreshold-operated silicon neuron circuit designed with qualitative neuronal modeling. One technical challenge to future implementation of such circuits is parameter tuning — a problem stemming from temperature sensitivity of subthreshold-operated MOSFETs and the uniqueness of individual circuits in a neuronal network due to transistor variation. This research proposes a fully automated parameter tuning algorithm that combines two heuristic approaches to search for appropriate circuit parameters over a range of temperatures. The algorithm can tune the circuit to behave as a Class I or Class II neuron.

Copyright
© 2013, the Authors. Published by ALife Robotics Corp. Ltd.
Open Access
This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).

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