Authors
Dinda Pramanta, Takashi Morie, Hakaru Tamukoh
Corresponding Author
Dinda Pramanta
Available Online 1 June 2017.
DOI
https://doi.org/10.2991/jrnal.2017.4.1.20
Keywords
pulse-coupled oscillators, synchronization, Winfree model, FIFO, GTX, multi-FPGA.
Abstract
This study proposes an implementation of pulse-coupled phase oscillators
over multiple field-programmable-gate-array (FPGA) communication links.
Two FPGAs are connected by a gigabit transceiver and a First-In First-Out
interface. To verify the effect of communication delay between FPGAs on
oscillator synchronization, we implement four oscillators on the multi-FPGA
platform. We have successfully observed synchronization over two FPGAs
correctly, despite of a 0.1 μs communication delay. The measurement results
show that first spike synchronization requires 12.47 μs with a 3.2 Gbps
communication throughput.
Copyright
© 2013, the Authors. Published by ALife Robotics Corp. Ltd.
Open Access
This is an open access article distributed under the CC BY-NC license (http://creativecommons.org/licenses/by-nc/4.0/).