Authors
Yang Xia1, *, Timothée Levi2, Takashi Kohno3
1Graduate School of Engineering, The University of Tokyo, 4-7-1 Komaba,
Meguro-ku, Tokyo 153-8505, Japan
2LIMMS/CRNS-IIS, The University of Tokyo, 4-7-1 Komaba, Meguro-ku, Tokyo
153-8505, Japan
3IIS, The University of Tokyo, 4-7-1 Komaba, Meguro-ku, Tokyo 153-8505,
Japan
*Corresponding author. Email: [email protected]
Corresponding Author
Yang Xia
Received 21 December 2019, Accepted 12 May 2020, Available Online 2 June
2020.
DOI
https://doi.org/10.2991/jrnal.k.200528.010
Keywords
SNN; STDP; DSSN; FPGA; ethernet
Abstract
By mimicking or being inspired by the nervous system, neuromorphic systems
are designed to realize robust and power-efficient information processing
by highly parallel architecture. Spike Timing Dependent Plasticity (STDP)
is a common learning method for Spiking Neural Networks (SNNs). Here, we
present a real-time SNN with STDP implementation on Field Programmable
Gate Array (FPGA) using digital spiking silicon neuron model. Equipped
with Ethernet Interface, FPGA allows online configuration as well as real-time
processing data input and output. We show that this hardware implementation
can achieve real-time pattern recognition tasks and allows the connection
between multi-SNNs to extend the scale of networks.
Copyright
© 2020 The Authors. Published by ALife Robotics Corp. Ltd.
Open Access
This is an open access article distributed under the CC BY-NC 4.0 license
(http://creativecommons.org/licenses/by-nc/4.0/).