Sansei Hori1, Hakaru Tamukoh2
1Graduate School of Life Science and Systems Engineering, Kyushu Institute
of Technology,2-4 Hibikino, Wakamatsu, Kitakyushu, Fukuoka, 808-0196, Japan
2Graduate School of Life Science and Systems Engineering, Kyushu Institute
of Technology, Research Center for Neuromorphic AI Hardware, Kyushu Institute
of Techn Kitakyushu, Fukuoka, 808-0196, Japan
pp. 37–42
ABSTRACT
Deep learning technology has made remarkable progress in recent years and
has been adopted for a variety of applications such as smartphones and
cloud servers. These systems employ dedicated processors to reduce power
consumption and process massive amounts of data. In this paper, we propose
a field-programmable gate array (FPGA) infrastructure for easy verification
of user logic. The infrastructure makes it easy to communicate and control
a host PC and user logic. We implemented two example logics, which were
simple image processing and a restricted Boltzmann machine, into the infrastructure
to confirm these features
Keywords: FPGA, Hardware Accelerator, Xillybus, RBM
ARTICLE INFO
Article History
Received 25 November 2020
Accepted 08 November 2021
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